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81 lines
1.6 KiB
Rust
81 lines
1.6 KiB
Rust
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mod r6502;
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use r6502::{R6502, Flags, Bus};
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// All-RAM bus for testing
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struct RAMBus
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{
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ram: [u8; 64 * 1024]
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}
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impl RAMBus
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{
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fn new() -> RAMBus
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{
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RAMBus { ram: [0; 64 * 1024] }
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}
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}
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impl Bus for RAMBus
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{
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fn read(&self, addr: u16) -> u8
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{
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self.ram[addr as usize]
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}
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fn write(&mut self, addr: u16, value: u8)
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{
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self.ram[addr as usize] = value;
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}
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}
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fn main()
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{
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let mut cpu = R6502::new();
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println!("\nStatus flag testing...");
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cpu.set_flag(Flags::I);
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println!("\nI Flag is: {}", cpu.check_flag(Flags::I));
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cpu.clear_flag(Flags::I);
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println!("\nI Flag is: {}", cpu.check_flag(Flags::I));
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println!("\nRunning a very simple test program:\n\tLDA #9\n\tORA #2\n Result should be 11 in the A register");
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//////////////////////////
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// Setup Bus with program
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//////////////////////////
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let mut bus = RAMBus::new();
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// program address
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let addr = 0x0020 as u16;
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// Set the program counter address
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bus.write(0xFFFC, (addr & 0x00FF) as u8); // low byte
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bus.write(0xFFFD, ((addr & 0xFF00) >> 8) as u8); // high byte
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// write the program to memory
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// LDA #9
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bus.write(addr, 0xA9); // LDA - Immediate mode
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bus.write(addr + 1, 0x09); // Argument
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// ORA #2
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bus.write(addr + 2, 0x09); // ORA - Immediate mode
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bus.write(addr + 3, 0x02); // Argument
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// Restart cpu
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cpu.reset(&mut bus);
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// Clock the cpu twice (Clock essentially runs one full instruction)
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cpu.clock(&mut bus);
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cpu.clock(&mut bus);
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println!("\nProgram result, A register: {}", cpu.a);
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println!("\nFinished.");
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}
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