Adds branching instructions (not tested)

master
Joey Pollack 2 years ago
parent b6029d0ef5
commit a07b784e5b

@ -551,48 +551,72 @@ impl Instructions
// BRANCHING // BRANCHING
fn BPL(cpu: &mut R6502, bus: &mut dyn Bus) fn BPL(cpu: &mut R6502, bus: &mut dyn Bus)
{ {
if cpu.check_flag(Flags::N) == 0
{
cpu.pc += cpu.working_data;
}
} }
fn BMI(cpu: &mut R6502, bus: &mut dyn Bus) fn BMI(cpu: &mut R6502, bus: &mut dyn Bus)
{ {
if cpu.check_flag(Flags::N) != 0
{
cpu.pc += cpu.working_data;
}
} }
fn BVC(cpu: &mut R6502, bus: &mut dyn Bus) fn BVC(cpu: &mut R6502, bus: &mut dyn Bus)
{ {
if cpu.check_flag(Flags::V) == 0
{
cpu.pc += cpu.working_data;
}
} }
fn BVS(cpu: &mut R6502, bus: &mut dyn Bus) fn BVS(cpu: &mut R6502, bus: &mut dyn Bus)
{ {
if cpu.check_flag(Flags::V) != 0
{
cpu.pc += cpu.working_data;
}
} }
fn BCC(cpu: &mut R6502, bus: &mut dyn Bus) fn BCC(cpu: &mut R6502, bus: &mut dyn Bus)
{ {
if cpu.check_flag(Flags::C) == 0
{
cpu.pc += cpu.working_data;
}
} }
fn BCS(cpu: &mut R6502, bus: &mut dyn Bus) fn BCS(cpu: &mut R6502, bus: &mut dyn Bus)
{ {
if cpu.check_flag(Flags::C) != 0
{
cpu.pc += cpu.working_data;
}
} }
fn BNE(cpu: &mut R6502, bus: &mut dyn Bus) fn BNE(cpu: &mut R6502, bus: &mut dyn Bus)
{ {
if cpu.check_flag(Flags::Z) == 0
{
cpu.pc += cpu.working_data;
}
} }
fn BEQ(cpu: &mut R6502, bus: &mut dyn Bus) fn BEQ(cpu: &mut R6502, bus: &mut dyn Bus)
{ {
if cpu.check_flag(Flags::Z) != 0
{
cpu.pc += cpu.working_data;
}
} }
/////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////
// INTERRUPT AND SUBROUTINE // INTERRUPT AND SUBROUTINE
///////////////////////////////////////////////////////////
// SINGLE BYTE
} }

@ -50,7 +50,7 @@ pub struct R6502
y: u8, // Y Register y: u8, // Y Register
pc: u16, // Program Counter pc: u16, // Program Counter
sp: u8, // Stack Pointer sp: u16, // Stack Pointer
status: u8, // Status Flags status: u8, // Status Flags
cycles: u32, // Track cycles cycles: u32, // Track cycles
@ -94,7 +94,7 @@ impl R6502
Registers::Y => self.y = value as u8, Registers::Y => self.y = value as u8,
Registers::PC => self.pc = value, Registers::PC => self.pc = value,
Registers::SP => self.sp = value as u8, Registers::SP => self.sp = value,
Registers::STATUS => self.status = value as u8, Registers::STATUS => self.status = value as u8,
} }
@ -121,7 +121,7 @@ impl R6502
self.a = 0; self.a = 0;
self.x = 0; self.x = 0;
self.y = 0; self.y = 0;
self.sp = 0xFF; // stack actually starts at 0x01FF but we only need the low byte since the end of the stack is at 0x0100 self.sp = 0x01FF;
self.status = 0; self.status = 0;
self.set_flag(Flags::U); self.set_flag(Flags::U);
@ -170,6 +170,19 @@ impl R6502
} }
fn stack_push(value: u8, cpu: &mut R6502, bus: &mut dyn Bus)
{
// TODO: Check for out of bounds errors
bus.write(cpu.sp, value);
cpu.sp -= 1;
}
fn stack_pop(cpu: &mut R6502, bus: &mut dyn Bus) -> u8
{
cpu.sp += 1;
bus.read(cpu.sp)
}
fn execute(instruction: u8, cpu: &mut R6502, bus: &mut dyn Bus) fn execute(instruction: u8, cpu: &mut R6502, bus: &mut dyn Bus)
{ {
@ -188,6 +201,8 @@ fn execute(instruction: u8, cpu: &mut R6502, bus: &mut dyn Bus)
return; return;
} }
// Interrupt and Subroutine
// Single byte instructions // Single byte instructions
// Instructions with arguments // Instructions with arguments
@ -278,9 +293,13 @@ fn exe_branch(instruction: u8, cpu: &mut R6502, bus: &mut dyn Bus)
{ {
let pc_offset = AddressingModes::REL(cpu, bus); let pc_offset = AddressingModes::REL(cpu, bus);
// TODO: Decode instruction // Decode instruction
// Need to map: 10 30 50 70 90 B0 D0 F0 - op code // Need to map: 10 30 50 70 90 B0 D0 F0 - op code
// to: 0 1 2 3 4 5 6 7 - method index // to: 0 1 2 3 4 5 6 7 - method index
// ChatGPT says: Index = (Value16) / 32 // ChatGPT says: Index = (Value16) / 32
let idx = ((instruction - 16) / 32) as usize;
Instructions::GROUP_BRANCHING_OPS[idx](cpu, bus);
} }

@ -658,3 +658,55 @@ fn CPX()
// Is the Z flag set? // Is the Z flag set?
assert_eq!(1, cpu.check_flag(Flags::Z)); assert_eq!(1, cpu.check_flag(Flags::Z));
} }
/////////////////////////////////////////////////////////////////////
// BRANCHING
/////////////////////////////////////////////////////////////////////
#[test]
fn BPL()
{
}
#[test]
fn BMI()
{
}
#[test]
fn BVC()
{
}
#[test]
fn BVS()
{
}
#[test]
fn BCC()
{
}
#[test]
fn BCS()
{
}
#[test]
fn BNE()
{
}
#[test]
fn BEQ()
{
}

@ -59,14 +59,14 @@ Instructions:
✔ 111 CPX @done(24-01-10 15:26) ✔ 111 CPX @done(24-01-10 15:26)
CONDITIONALS: CONDITIONALS:
☐ 10 BPL ✔ 10 BPL @done(24-01-12 16:49)
☐ 30 BMI ✔ 30 BMI @done(24-01-12 16:49)
☐ 50 BVC ✔ 50 BVC @done(24-01-12 16:49)
☐ 70 BVS ✔ 70 BVS @done(24-01-12 16:49)
☐ 90 BCC ✔ 90 BCC @done(24-01-12 16:49)
☐ B0 BCS ✔ B0 BCS @done(24-01-12 16:49)
☐ D0 BNE ✔ D0 BNE @done(24-01-12 16:49)
☐ F0 BEQ ✔ F0 BEQ @done(24-01-12 16:49)
INTERRUPT/SUBROUTINE: INTERRUPT/SUBROUTINE:
☐ 00 BRK ☐ 00 BRK

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